Nozomu Togawa, Professor, Faculty of Science and Engineering
Specialization: IoT, information and communications technology
Part 3: Decrease Surface Area, Accelerate Processing, and Reduce Power Consumption
It is said that we are approaching the limit of Moore’s Law, an observation that has supported the development of information and communications technology. In order for the Internet of Things (IoT) to spread and prevail, technology will need to exceed this limit. Professor Nozomu Togawa of the School of Fundamental Science and Engineering has researched “beyond the limit” in order to optimize the integrated circuits responsible for running the computers we use. (Interview date: September 7, 2017)
Exceeding the Limits of Moore’s Law
There is a fundamental principle for optimizing integrated circuit designs that states, “decrease surface area, accelerate processing, and reduce power consumption.” A smaller surface area means that more integrated circuits can be included in the design, and that more functions can be added to the device. Higher processing speeds improve the processing performance of computers. Additionally, lower power consumption means that devices can be used for a longer time without the battery dying.
Moore’s Law is a rule of thumb that describes the technological progress of integrated circuits (IC), which could be described as the brains of computers. Advocated by Gordon Moore, a co-founder of Intel, Moore’s Law states that the integration density of semiconductors (elements in integrated circuits) doubles every 18 to 24 months. Based on Moore’s Law, if the integration density doubles, only half the surface area is needed for the same purpose. This means that processing speed will increase and power consumption will decrease. In other words, Moore’s Law can be used to describe technological progress until now in terms of “decrease surface area, accelerate processing, and reduce power consumption.”
However, technological progress is said to be slowing down compared to the speed predicted by Moore’s Law. There is a limit to how dense and small semiconductors can become, and we have begun to hit that wall. Now that it has become difficult to miniaturize semiconductors, we need to find some other way to improve the performance of devices as we continue to “decrease surface area, accelerate processing, and reduce power consumption.” Our focus is now on methods such as improving performance by installing higher performance circuits in the same integrated circuit. This requires skillful circuit design.
Although the principle mentioned above has been and continues to be important, it will only grow in importance as the so-called Internet of Things (IoT) continues to spread. IoT devices are expected to be used in various settings, including locations where stable power cannot be obtained (such as in forests, on oceans, and in outer space). Devices in these environments will need to be self-sufficient by generating power from the environment itself (such as sunlight or vibration) rather than being supplied with an external power source.
For example, we are currently investigating ways to build new systems based on our belief that computing systems that operate optimally according to the situation on just electricity generated from environmental energy (such as sunlight, wind, or vibration) will support the coming IoT society.
As IoT devices will also be used in various locations even those difficult for human access, replacing their parts could be challenging. Such systems will need to be able to operate reliably for a long time without requiring any maintenance. In our laboratory, we have therefore been focusing on integrated circuits (IC), which are major parts in such systems.
Improving FPGA Performance
In order to “decrease surface area, accelerate processing, and reduce power consumption,” we continued to study a type of integrated circuit called a field-programmable gate array (FPGA). The circuits in FPGAs can be programmatically rewritten to operate in completely different ways. FPGAs offer many benefits. For example, if a bug is discovered in a circuit, its program can simply be rewritten to fix it. FPGAs are very easy to use.
One research topic I had pursued since I was an undergraduate student to my doctoral course was how to “decrease surface area, accelerate processing, and reduce power consumption” by improving FPGA designs. FPGAs first became available at the beginning of the 1990s, when I entered my master’s course. At that time, we had yet to know how to accelerate FPGAs or how to reduce the power they used. I researched how to use FPGAs to “increase density, accelerate processing, and reduce power consumption,” and eventually summarized my findings in my thesis, “Research on Design Automation Methods for FPGAs.”
Although research in engineering is driven by the curiosity of researchers, it is also driven by the need to create things that can benefit society. At that time, there was a social call as to how best to use FPGAs. They had just become available, and so there was little documentation or knowledge on how to use FPGAs. Research was tough going, but very worthwhile. FPGAs are now used as integrated circuits in many electronic devices. One of my current research topics is how to use FPGAs to accelerate image processing and secure multi-party computation.
In Part 4, Professor Togawa will discuss his thoughts and motto on research and education, and comment on his overall image of Waseda University students.
Professor Togawa completed the Electrical Engineering Doctoral Course at the Waseda University Graduate School of Science and Engineering in 1997 (Doctor of Engineering). He has worked as a research associate in the School of Science and Engineering, Electronic/Information Communication Department, Waseda University; an assistant professor in the Faculty of Environmental Engineering, University of Kitakyushu; and an associate professor in the School of Fundamental Science and Engineering, Department of Computer Science and Engineering, Waseda University. Since 2009, he has worked as a professor in the Faculty of Science and Engineering (School of Fundamental Science and Engineering) at Waseda University. He specializes in integrated circuit design, and related applied technologies and security technologies. He has been the recipient of many awards, including The Telecommunications Advancement Foundation’s Telecom System Technology Award (2011). For details, visit the Togawa Laboratory
- Hardware Trojans classification for gate-level netlists based on machine learning (2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design, 2016, p.203-206)
- A score-based classification method for identifying Hardware-Trojans at gate-level netlists (Design, Automation & Test in Europe Conference & Exhibition, 2015, p465-470)
- A Stayed Location Estimation Method for Sparse GPS Positioning Information (2017 IEEE 6th Global Conference on Consumer Electronics, 2017)
- An Accurate Indoor Positioning Algorithm using Particle Filter based on the Proximity of Bluetooth Beacons (2017 IEEE 6th Global Conference on Consumer Electronics, 2017)
Honors and Awards
1994 Student Paper Award, The Telecommuncations Advancement Foundation
1995 Best Paper Award, IEEE Asia and South Pacific Design Automation Conference
1995 Isao Okawa Memorial Achievement Award, Waseda University
1995 Azusa Ono Memorial Award, Waseda University
1996 Honorable Mention at the Circuit and Systems Workshop in Karuizawa, Nagano, JP, The Institute of Electronics, Information and Communication Engineers
1996 Ando Incentive Prize for the Study of Electronics, The Foundation of Ando Laboratory
1997 Yasujiro Niwa Outstanding Paper Award
2001 Takeda Techno-Entrepreneurship Award, The Takeda Foundation
2009 Honorable Mention from the Marubun Research Promotion Foundation
2009 Funai Academic Award, Funai Foundation for Information Technology
2010 Telecommunications System Technology Award, The Telecommunications Advancement Foundation