Date | 1:00PM-6:00PM March 8, 2018 |
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Avenue | Conference Room 102, Green Computing Systems Research and Development Center |
Participant fee | None |
Organizer | The Okawa Foundation for Information and Telecommunications Frontier of Embodiment Informatics: ICT and Robotics, Waseda University Advanced Multicore Processor Research Institute, Waseda University |
Sponsorship | IEEE Computer Society Japan Chapter IEEE Computer Society Multicore STC THE DAIWA ANGLO-JAPANESE FOUNDATION |
International Symposium on Future of High Performance Green Computing 2018の開催について
The purpose of this symposium is to hold a discussion on high performance green computing that brings together world leaders in the field, centering on Dr. David Kuck, Intel Fellow and Professor Emeritus, University of Illinois at Urbana-Champaign, who will be awarded the Okawa Prize* on March 7, 2018. Dr. Kuck is a recipient of the IEEE Computer Society Computer Pioneer Award. He is a parallel programming technology pioneer whose achievements include developing the ILLIAC IV (the world’s first supercomputer), developing automatic parallelizing compiler technology, which is utilized in today’s servers, supercomputers and PCs, developing parallel programing technologies, as represented by OpenMP, and developing program debugging and tuning tools.
The seminar will include the world’s most advanced lectures and a round-table discussion by University of Illinois at Urbana-Champaign Prof. David Padua, who is a world leader in parallel programming and HPC, Waseda University Prof. Hironori Kasahara, who is a parallel compiler and multicore researcher and Japan’s first President of the IEEE Computer Society, Westminster University Prof. Vladimir Getov, who is a member of the IEEE Computer Society’s Board of Governors and a well-known researcher of low power consumption computing, and Seoul National University Prof. Jae Jin Lee, who is a leader in the field of embedded parallel computing.
*The Okawa Prize is intended to pay tribute to and make public recognition of persons who have made outstanding contributions to the research, technological development and business in the information and telecommunications fields, internationally.
Program
Symposium
12:30 | Reception Start |
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13:00 – 13:15 | Opening Address |
13:15 – 14:05 | Dr. David Kuck |
14:05 – 14:35 | Prof. Hironori Kasahara |
14:35 – 14:50 | Coffee Break |
14:50 – 15:20 | Prof. David Padua |
15:20 – 15:50 | Prof. Vladimir Getov |
15:50 – 16:20 | Dr. Peter Braam |
16:20 – 16:50 | Prof. Jaejin Lee |
16:50 – 17:00 | Coffee Break |
17:00 – 18:00 | Round Table |
18:00 | Closing Address |
18:10 | End |
Banquet(RIHGA Royal Hotel Tokyo)
18:30 | Opening Address |
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20:25 | Closing Address |
20:30 | End |
Keynote Speaker

Intel Fellow
Professor Emeritus, University of Illinois, Urbana-Champaign
Six Solvable System Challenges
Today’s SW tools provide performance profiles, mostly in architectural terms (cpi, cache misses, etc.), but little energy information about computations. To fix problems, SW developers need more insight about their code and its HW interactions. For example, new system modeling technology reveals codelet energy consumed per HW node. Modeling can also enable What-if analyses answering developer questions about the potential value of vectorization, loop tiling, etc. System user input can also enhance operating policies, accepting performance or power limits and optimization goals (e.g. maximize perf/energy, subject to a power limit). HW/SW codesign is the hardest problem, and requires all of the above together with What-if analyses allowing architects to vary BW, latency and storage size of HW nodes, and run tens of thousands of codelets in system-optimized forms. These topics will be presented in terms of 6 hard but solvable system challenges.
Biography
David Kuck is an Intel Fellow doing R&D in Intel’s Software and Solutions Group. He led the Parallel and Distributed Solutions Division, which produced parallel software development tools, including the Intel Threading and Cluster Tools. He is currently working on the HW/SW codesign of architectures and applications based on performance, energy and cost.
Kuck was a Professor of CS and ECE at the University of Illinois (UIUC), where he founded (1983) and directed the Center for Supercomputing Research and Development through 1992. In 1993, he left the university and joined Kuck and Associates, Inc. full time. He served as Chairman of KAI from its founding in 1979 until 2000 when it was acquired by Intel. In the 1990s, KAI developed the OpenMP parallel programming standard, KAP/Pro Toolset for parallel program development, and the KCC C++ compiler technology.
His R&D career has included contributions to the architecture and software of a number of parallel computer systems, including Illiac IV, Burroughs BSP, Alliant FX, and Cedar, as well as the development of the Parafrase compilation software for parallel program restructuring. He is a Fellow of the IEEE, ACM and AAAS, and has received a number of awards for computer architecture and software design, including the IEEE Piore Award, the IEEE Computer Society’s 2011 Computer Pioneer Award and the Charles Babbage Award, the ACM-IEEE Eckert-Mauchly and Kennedy Awards, and is a member of the National Academy of Engineering.
Kuck received a B.S.E.E. from the University of Michigan, an M.S. and Ph.D. in Engineering from Northwestern University, and was a Ford Foundation post-doc and Assistant Prof. of EE at MIT.
Invited Speakers
David Padua
Donald Biggar Willett Professor of Engineering,
University of Illinois at Urbana-Champaign
Then and Now: How parallel computing has changed since 1979.
I will present an outline of the history of parallel computing since 1979. The talk will focus on the evolution of machine organization, languages, compilers, and applications. The presentation will be based on a project that Robert Kuhn and I initiated a few weeks ago to commemorate the Tutorial on Parallel Processing that we put together and IEEE Press printed in 1979. Robert Kuhn and I were PhD students of David Kuck and he encouraged us to create the tutorial.
Biography
David Padua is the Donald Biggar Willet Professor of Engineering at the University of Illinois, where he has been a faculty member since 1985. He has done research on parallel computing, autotuning, and compilers and has published more than 170 papers in those areas. He has participated in the organization of more than 70 conferences and workshops and served on the editorial board of ACM TOPLAS, JPDC, IEEE TPDS, and IJPP and as Editor in Chief of the Encyclopedia of Parallel Computing (Springer‐Verlag). He is a fellow of the IEEE and the ACM and the recipient of the 2015 IEEE Computer Society Harry H. Goode Award. In 2017, he received a doctorate honoris causa from the University of Valladolid in Spain.
Sponsors
Organizer | The Okawa Foundation for Information and Telecommunications Frontier of Embodiment Informatics: ICT and Robotics, Waseda University Advanced Multicore Processor Research Institute, Waseda University |
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Sponsorship | IEEE Computer Society Japan Chapter IEEE Computer Society Multicore STC THE DAIWA ANGLO-JAPANESE FOUNDATION |
Accommodations
RIHGA Royal Hotel Tokyo
1-104-19 Totsuka-machi, Shinjuku-ku, Tokyo 169-8613, Japan
TEL:+81-(0)3-5285-1121
Venue
Green Computing Systems Research Organization
27 Waseda-machi, Shinjuku-ku, Tokyo, Japan 162-0042
TEL:+81-(0)3-3203-4369
Transportation between the hotel and the venue
Walk (approximately 10 minutes)
Public transport (approximately 25-30 minutes, cost around 400 yen)
Taxi (approximately 10 minutes, cost around 730 yen)